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ATmega128
bottom
Signalize that TCNT2 has reached minimum value (zero).
Depending of the mode of operation used, the counter is cleared, incremented, or decremented
at each timer clock (clk T2 ). clk T2 can be generated from an external or internal clock source,
selected by the clock select bits (CS22:0). W hen no clock source is selected (CS22:0 = 0) the
timer is stopped. However, the TCNT2 value can be accessed by the CPU, regardless of
whether clk T2 is present or not. A CPU write overrides (has priority over) all counter clear or
count operations.
The counting sequence is determined by the setting of the W GM01 and W GM00 bits located in
the Timer/Counter Control Register (TCCR2). There are close connections between how the
counter behaves (counts) and how waveforms are generated on the output compare output
OC2. For more details about advanced counting sequences and waveform generation, see
“Modes of Operation” on page 149 .
The Timer/Counter overflow (TOV2) flag is set according to the mode of operation selected by
the W GM21:0 bits. TOV2 can be used for generating a CPU interrupt.
Output Compare
Unit
The 8-bit comparator continuously compares TCNT2 with the Output Compare Register
(OCR2). W henever TCNT2 equals OCR2, the comparator signals a match. A match will set the
output compare flag (OCF2) at the next timer clock cycle. If enabled (OCIE2 = 1 and global inter-
rupt flag in SREG is set), the output compare flag generates an output compare interrupt. The
OCF2 flag is automatically cleared when the interrupt is executed. Alternatively, the OCF2 flag
can be cleared by software by writing a logical one to its I/O bit location. The waveform genera-
tor uses the match signal to generate an output according to operating mode set by the
W GM21:0 bits and compare output mode (COM21:0) bits. The max and bottom signals are used
by the waveform generator for handling the special cases of the extreme values in some modes
of operation (see “Modes of Operation” on page 149). Figure 63 shows a block diagram of the
output compare unit.
Figure 63. Output Compare Unit, Block Diagram
DATA BUS
OCRn
TCNTn
= (8-bit Comparator )
OCFn (Int.Req.)
top
bottom
FOCn
Waveform Generator
COMn1:0
WGMn1:0
OCn
The OCR2 Register is double buffered when using any of the pulse width modulation (P W M)
modes. For the normal and Clear Timer on Compare (CTC) modes of operation, the double buff-
147
2467X–AVR–06/11
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